1. Field of the Invention
The present invention generally relates to receivers, and more specifically to an input buffer amplifier having a centroidal layout.
2. Background Art
Receivers often include components that are connected together to process and retrieve data from a received signal. For instance, a typical receiver may include a progranimable gain amplifier, analog mixers, various filters, and an analog-to-digital converter (ADC), all of which are typically connected together in series. The mentioned components operate on the received signal so as to retrieve data that is typically delivered to a processor.
Often times, buffer amplifiers are inserted between the series components of the receiver to insure that the output of one component can sufficiently drive the input of the following component. For instance, a buffer amplifier may be needed to drive the ADC because the sampling performed by the ADC can cause signal distortion. Furthermore, the buffer amplifiers also operate to isolate any impedance mismatches between the receiver components.
In differential receivers, there is a positive signal path and a negative signal path to process the positive and negative components of the received differential signal. It is desirable that the electrical components, including the input buffer amplifier, are matched for the two signal paths. If the electrical components are not matched, then an offset voltage can develop between the two signal paths. Any offset voltage reduces receiver sensitivity to low power signals, and reduces overall receiver performance.
The circuit layout of a differential circuit (including a differential buffer amplifier) can cause the generation of the offset voltage that reduces the electrical performance of the differential circuit. An offset voltage between two differential paths reduces the net available dynamic range in the system. Furthermore, common mode offsets produce distortion in the amplifier.
The differential circuit can produce the unwanted offset voltages if the layout is not symmetrical between the positive and negative paths. This occurs because an unsymmetrical layout produces mismatched components in the two differential paths that cause the unwanted offset voltages. Therefore, what is needed is an input buffer layout that is symmetrical so as not to produce DC offset voltages.